DTMF Decode Store & Display

This circuit will decode a string of DTMF tones and store them in memory
allowing you to index through the memory and display each of the DTMF 'digits' when you wish.
It is a hardware only design, and is therefore less complex
than some microprocessor based designs that have appeared in magazines etc.
IC1 is a Motorola 145436 DTMF decoder which produces a
BCD weighted output for the correct tone pair it sees at its input.
As well, it produces a 'data available' (dv) level change at pin 12.
Most DTMF string of tones are non continuous,
which means each DTMF is separated by a no-signal
pause (usually about 60 milliseconds each),
and therefore the pulsing signal at pin 12 (dv) can be used
as a strobe to load the BCD digit into the 6116 RAM.



IC5 is a quad Schmitt trigger NAND gate with IC5b and its associated RC network
used to form an inverted write pulse for IC2.
The 'data available' pulse is also used to increment a simple address register,
via IC5a and IC5c, to IC3, a CMOS ripple counter.
The address presented to IC2 is then ready for the next DTMF decode.
The output display has been kept simple and consists of a 7404 inverter (IC4) driving 4 LED's.
Each LED has a binary weighting (8, 4, 2 and 1) as the output is in BCD form.
Otherwise, a BCD to 7 segment decoder/display driver could be used instead of the 4 LEDs.
To utilise the circuit, I recommend that DTMF tones
(from a scanner, radio receiver, etc) are first recorded on tape.
Set the read/write switch to ' write' and push the reset button,
the feed the audio signal from the tape player into the circuit.
IC1 will then decode and self-clock each sequential DTMF decode into IC2,
starting at address 0000.
To read the information, throw switch to 'read' press the reset button
and then index through the memory using the address push-button (debounced by IC5c).
The display will show each digit in order.
The circuit operates from a 5v regulated dc supply.